Intel's 8085 and its Architecture

The Intel's 8085 Microprocessor

• The 8085 is an 8 bit, N channel Metal Oxide Semiconductor (N-MOS) microprocessor.
• It is a 40 pin IC package fabricated on a single Large Scale Integration(LSI) chip.
• The Intel 8085 uses a single +5V DC supply for its operation.
• Its clock speed is about 3 MHz. The clock cycle is about 320 ns.
• The time for the clock cycle of Intel 8085 is 200ns.
• It has 80 basic instructions and 246 opcodes.
• The 8085 is an enhanced version of its predecessor, the 8080A.
• Its instruction set is upward compatible with that 8080A. Upward compatible means codes written for 8080A will also work for 8085.

Architecture of Intel 8085

The architecture of 8085 consists of following main sections:

    1. Arithmetic and Logic Unit(ALU)

• ALU performs the following arithmetic and logical operations:

           - Addition

           - Subtraction

           - Logical AND

           - Logical OR

           - Logical XOR

           - Compliment

           - Increment

           - Decrement

           - Left Shift

           - Clear

• The ALU is the unit that manipulates the data.
• ALU includes the accumulator, the temporary register, the arithmetic and logic circuits and flags.
• It uses data from memory and accumulator to perform arithmetic.
• Always stores result in accumulator.

    2. Timing and control unit

• Control unit generates signals within microprocessor to carry out the instruction which has been decoded.
• In reality causes certain connections between blocks of microprocessor to be opened or closed so that data goes where it is required and so that ALU operations occur.

    3. Registers

• The 8085/8080A programming model includes six registers, one accumulator, one flag register, two 16 bit registers: the stack pointer and the stack counter.

    4. Instruction register/decoder

• Instructions register temporarily stores for the current instruction of a program.
• Latest instructions are sent here from memory prior to execution.
• Decoder then takes instruction and 'decodes' or 'interprets' the instruction.
• Decoded instruction is then passed to a next stage.

    5. Memory Address Register

• Holds address recieved from program counter of next program instruction.
• Feeds the address bus the address of location of program under execution.

    6. Flag flip-flops

• These flip-flops are set/reset after an operation according to data conditions of the result in the accumulator and other registers.
• The 5 flags included into ALU are:

           - Sign Flag

           - Zero Flag

           - Auxiliary Carry Flag

           - Parity Flag

           - Carry Flag